In memory integrated circuits, sense amplifiers are used to detect and determine the data content of a selected memory cell. In EEPROM (Electronically Erasable Programmable Read Only Memories) and Flash memories, the sense amplifier serves two functions. Firstly, the sense amplifier precharges the bitline to a clamped value, and secondly, it senses the current flowing into the bitline, which depends on the memory cell state. Both the reliability, in terms of endurance and retention, and the performance depend greatly on the design of the sense amplifier.
A majority of integrated sense amplifier structures are based on a differential amplifier being used to compare the current coming from the selected memory cell to the current of a reference cell. The reference cells can be implemented in different ways, and are of different types. The reference cells are programmed one time only during the test of the memory, thus increasing the testing time. In order to ensure a good functionality of the sense amplifier, the ratio Icell/Iref must be maintained high enough to take into account any process fluctuations on the memory and the reference cells, and any impact of the memory cycling on the memory cells. Moreover, it has been shown that the speed performance and reliability of standard differential amplifier sense amplifiers are highly reduced for supply voltage values under 2 V. For example, U.S. Pat. No. 6,639,837 to Takano et al. discloses a current mirror circuit and a differential amplifier circuit for sensing multiple current levels stored in a memory cell.
Other types of sense amplifier structures are non-differential types that have nonsymmetrical circuits which detect and amplify signals which are generated by an accessed memory cell on a single amplifier input node. These types of sense amplifiers are often referred to as “single-ended.” Among the single-ended sense amplifiers of the prior art is U.S. Pat. No. 5,666,310 to Yu et al., which discloses a single-ended sense amplifier that senses the current drawn by a memory array and changes a state of an output once a certain current has been reached. U.S. Pat. No. 5,013,943 to Hirose discloses a single-ended sense amplifier having a precharge circuit in order to lessen an effect of changing the bitline capacitance.
A trend in recent years is to design memory circuits that consume less power by decreasing power supply voltages of the memory device. As the power supply voltages decrease and the number of bits stored in a memory cell increase, it becomes more important that the sense amplifier be able to accurately sense very low current levels.